Cool thing about it is it is free. No money required. Anyone can go and get it known cancelling here in a second. It's a C++ class library that gives C++ the notion of time. It's available from accellera. You can go out there and download it. It comes with a whole bunch of examples, some of which we will look at. I placed some files in D2L for you to take a peek at. There's a TA last year, worked very hard to figure out how to get system C installed in Windows with Microsoft Visual Studio, and it was a real challenge to get it to work. My recommendation would be, go out to Oracle, download VBox. Last time I checked it's still free. Go find a free version of Linux, Ubuntu, something along those lines. It's really designed to be run in Unix or Linux environment and it just runs better. You just run into less problems. It relies on make and make uses Doxygen to extract documentation from the files and create HTML pages. You can go peruse it with a web browser. All of that, it's a little challenging on a Windows system. I did it on my Mac, and underneath Mac is a BSD Unix and it works like a champ, I think I'll just skip past some. There's a link there for that VirtualBox download. Doxygen is what creates all these HTML documentation. You can also go to IEEE and gets the SystemC 1666-2011.pdf file. It's available. It's one of the documents available for free from IEEE. At least the last time I checked it was. And gives a good introduction to SystemC. There's also Open SystemC initiative, and then gave you the link there. We're not going to go spend any time looking at those links. It's just for your consumption at a later time. If you have any free time this Summer, I'd strongly encourage you to just to play around with it just a little bit so you can just build a little simple test model. It doesn't have to do a whole lot. But just that organic physical process of going through the exercise hands-on with something, I think you'll find interesting. So, how many of you have had C++ programming courses? Maybe half or so. Okay. Before I go on, it's object-oriented programming in less than 60 seconds. Raise your hands if you've had a C class. Okay, that's pretty much everybody. Okay. All right. For those of you who've had C++, you're probably better as C++ than I am. I taught myself C++ just through trial and error and reading online. The idea behind C++ is encapsulation of methods in data. One of the drawback to traditional C is there's global variable declared some place some routine anywhere, any piece of code can go modify a global variable and it can lead to very difficult and hard to find bugs. So C++, one of the notions of C++ and there are many, is this notion of encapsulation. So, you can define a class, and I'm not going to draw all the syntax for this. Which you can define a class, maybe we call it Bob, class Bob. Inside this class, there can be public colon as a keyword and you can declare variables int a, for instance. So, this would be a publicly accessible variable to some code that's outside the class. But you can also define methods, which are just C functions. So, you might have a function in here defined as Ted, does something. Have Ted's definition in here. If you wanted to execute from some other code where this class has been instantiated, you'd say Bob-Ted and if there were any arguments to Ted, that's how you would access it. So, when you see that notation, this means I'm referring to something called Bob, some object called Bob, and I'm calling a method inside it and I'm passing it at these parameters. Then you can have private as well. Variables and methods as well, functions. There's one more called protected, but I'm not going to go into that because it's outside the scope of what I wanted to talk about. So, once you have a class defined, then there's syntax in C++ for creating an instance of this class, one or more instances of it. So, it's very much like in Verilog or VHDL. You design a module that has state machines and maybe some data processing and so forth and some private helper flip-flops in there that helped the state machine. It's very similar to that. But you can't do anything with that module until you instantiate it in another module. So, there's this notion of instantiation. So, this is the idea of object oriented programming. It's encapsulating data and methods, some of which can be public and some of which can be private, inside an object so that you have to make explicit calls to methods that are used to set variables inside this class. So, it's not uncommon to see object that set something, a variable name and you pass in a value, and an object that get some variable name and it returns that variable from the public or private section. That's the gist. So, here in this diagram, we see standard C++, and the core language introduces the notion of MARTs. That's a combination of modules and ports. Modules and ports which are very analogous to RTO constructs in either Verilog or VHDL. Processes, interfaces, channels and events, are also part of the core language. There's predefined- these modules communicate with each other through channels and there's these predefined channels of signals, clocks, FIFO's mutexes and semaphores. It's a bunch of utility, handling, routines. Interestingly enough, they introduced four-valued logic types and there is a routine you can call that will dump out a vcd file. If you've run a verilog simulation, you can dump a vcd file and bring it up in any waveform viewer and makes you capable of viewing vcd files, just like you can with Verilog. I don't remember what format VHDL uses. I might not be able to ensure VHDL is used in the U.S. or outside of the military range. Everybody that I know uses Verilog. I thought it was very cool, four-valued, if you want. Support vectors and some various datatypes here. Then they added some additional content to this library for verification, and something called TLM that stands for transaction layer modelling. So, what we're going to look at tonight is what it's called precisely timed modelling. There's another type of modeling which is more abstract and what we're going to look at tonight called transaction layer modelling and it's what referred to as loosely timed. I put the TLM pdf document in D2L if you wanted to take a look at it. But we're not going to talk about it tonight. There's nothing on the test about it on the final. But I just wanted to make you aware of that. That there's these two classes of modelling. There's one that's very precision oriented and there's one that's what's called loosely timed. So, these classes provide a hierarchy of modules just like you'd see in a VHDL or Verilog design. It enables structural connectivity between those modules so that they can pass messages. They can pass data back and forth between them. Offers the ability for scheduling and synchronization between processes and modules. Most importantly, it introduces this notion of the passage of time which C++ doesn't have. If you ever tried to model, something that has time in C++, it gets to be a real pain when you're in a big hurry. When I discovered SystemC years ago, I thought this is fabulous because now I can code and see, its very fast, I just get an executable program to run a.exe file or if it's on a Linux box, something is executable in nature and you just run it. Passage of your time is huge. If you approach your design appropriately, you can separate computation from communication. In my example that we'll look at, this is what I've done. There are hardware oriented datatypes for modelling. So you could, like I said, model four state values like you can in VHDL and Verilog if you want to model something at that level. Whether or not tools exist that can take a very low level notion of a system C model and translate it into Verilog RTL or VHDL RTL is unclear to me at this point in time. There was a company in the early 2000s that was trying to do that and I don't know what happened to them. I lost track of that company. Wouldn't surprise me that there's some company or a startup out there that has this translator if you've written at the very lowest level, which will be the first example that we'll take a look at. So, it can be RTL-like with the notion of a clock signal. It has the notion of processes, no clock in these processes. You don't have to have a clock. So, I'm moving up in levels of abstraction. There's no clock but there is a notion on the passage of time. Then at the very highest level, there's this transaction level modelling. Like I said, it's what's referred to as approximately time. You use this in a very- when you were starting to build a very complex system and you don't know exactly what you need or require your timing to be but you just want to start building a system that simulates the physical system you intend to build at some point, or maybe have it already running as a physical plant, a manufacturing facility for instance. You might want to start there and then work your way down. If you can't get what you want out of your transaction level modeling, then it means you need to go to one that's precisely timed. It means going down in abstraction and not higher levels of abstraction.
