So, we're going to look at some examples that come with the standard system C distribution. You get those if you go out to accelerate, download it, and untie it you'll get all of this code. So, there's this example called a pipe example, it's clocked and it's very much like RTL code. There's several process examples. One of them is called simple_fifo, and it doesn't burn any time but it implements the notion of processes. There's another one called simple performance, which again is a process but it does take time into account. Then there's my baggage_system that does take time into account. I'm going to go look at these first three examples and I want to come back to this slide and go a little further here. It's two inputs a and b, and the first one multiplies a times b. So, this one computes a plus b and sends it to the output. This one does a minus b and this is in stage one. These come over as a and b and it produces a times b, sends it to the output and it's I think it's a divided by b. This is stage two. These come over to a third stage in the pipeline where I believe this is a and this is b, I think it produces an output where a is raised to the b. These processes are drawn from a clock, which is up in the main program. I'm going to spend time just showing you the code for pipeline stage one, two, and three. As you can see what that code looks like. There's make files for these things. You just type make, compiles it, you get an executable and it'll runs right there which is a C program. So, this is the C++ for stage one and there's a method called add sub that takes two doubles a and b, it reads the inputs in1 and in2 are interface instances and we read input from them and we compute the sum of a plus b and we write that to the output. That's what this write method is. So, these are read methods. Read method on the input and this is a write to an output, and it writes a minus b as the difference. So, this is the routine that actually does the math. All the interface stuff is handled, I don't know why they chose to organize their code, this all could be in one file, this is how they chose to do these examples. So, here you can see it's a structure, it's of sc_module type. There's n1 and n2 which are double precision floating points values of type SC and this a type of port in system C much like an input on a Verilog or VHDL module and the outputs of sum and difference and this key signal clock, it's an sc_in of type Boolean, can take on only 0 and 1 values. The constructor, if you haven't had C++, I'm not going to get into what constructors do in any detail but there's this notion when a module gets instantiated there's code that needs to perform some initialization of the instance that's being instantiated. We don't have this per se in Verilog and in VHDL but in C++ we do, so this is the constructor and it says it's an sc_method and there's a routine called addsub that we saw and find in other file which is still part of this class or structure. I never looked up but don't initialize does but here's the syntax that says clock.pause is when this thing runs addsub. So, every positive edge of the clock, it will take whatever is on n1 and n2, call addsub and assign those values to the sum in difference and the output on every rising edge of the clock. We see the exact same thing with the second pipeline stage. There's a method called multdiv and it reads its two inputs from sum and difference and looks like, I don't know if they did that or if I added this, I can't remember, I was trying to stop the divide by zero error, so I detected if b was equal to zero, either me or they I can't remember, somebody did and just set b equal to five, it looks like something I would do. So, it computes eight times b and a divided by b and writes those to the output of product and quotient that we'll see defined in the header file at each file. So, those are the sc_outs or doubles, there's the prod, the product and the quotient and again there's this clock, this whole thing gets triggered on the positive edge of the clock. We see exactly the same thing in this third case, where we're computing the power and we're raising a to, if a is greater than zero and b is greater than zero, we take a and raise it to b otherwise we return zero and we write the results as c to power.out which was the output, which was the very final output over there on the right. So, this is very RTL like system C. If you're comfortable this is the level you're at. This is the way your brain works, more power to you I like it because you think like a hardware person. I'm a hardware person, so this appeals to me. So, in simple_fifo we have no clock and no time passing. I don't know if I want to describe this from the bottom-up or the top-down, let me try it from the bottom-up. You don't have to but what they did here is they decided to create their own class for a right interface and their read interface and there's two modules in this, so a producer module and a consumer module that has a fifo sitting in between the two of them, like that's how it connects other producer. Produces things and puts it into this fifo and the consumer takes entries out of the fifo. That's all this does. So, they created their own interfaces called write interface and read interface and that's a syntax for it. Then they create, I'm not going to go through this in detail. Here's the class definition for the fifo and its interfaces has a write and a read interface on it and it implements the functionality of the fifo So, putting data elements in and reading data elements out. Here's the producer module. So, the producer module has an output, has an sc_port of the write underscore interface type which was defined up above and it's name is out. This tells the system that we have a process called producer and this is the definition for producer and it has an SC_THREAD which is code that we want to run and we call it main. So, you'll see main used a lot in the system C examples. So, every class can have its own main program. It doesn't have to be called main, it can be called whenever you want it to be called be a Bob, Ted, Bill or whenever it doesn't matter. But that name has to match this name it has to be found within the name scope of this class. So, a main is called, prints out the whole string and it just writes a string of characters out as output that goes to the fifo. So, we've got the producer module feeding output to the fifo and then the consumer module takes entries from the fifo and what's passed are the individual characters in that string. The consumer module looks very like the consumer except it's got an sc_port, which is a read interface and it's named in, and the same stuff. What this is doing, if I remember correctly, this thing runs in an infinite loop here and it's calling read on the in. So, if there's nothing in the fifo, you won't get anything back. In fact, execution stops right here and waits for something to show up. So, you don't have to say if there's something there, if there's something there, if there's something there, it does that for you. Then C out is away just to print output to standard output. So, it sends a character to standard output so you can see it. The top module here, it's a class of a sc_module type and we declare instance variable. So, this is a pointer to an instance of the fifo. This is a pointer to the producer of type producer. This is a pointer to an object of consumer and this is where they get instantiated. So, you either call in C++ when you want to create something new, there's a keyword new, and this is the thing you want to create and you can pass the strings. So, this instantiates just like you would in Verilog, fifo and assigns that pointer to a fifo instance up here and it's exactly the same thing happens. So, this instantiates fifo, instantiates producer, and instantiates consumer. Now, it's all connected up. Like in C++ you have to have a top main and in system C it's sc_main, you have to have that you'll get a link or error if you don't have sc_main declared. So, an sc_main instantiates top and its instance name is topped one and you can pass it or string if you want. Then this is what causes time and the simulation to run is sc_start. So, it runs, it does its thing and all that happens is as the producer sends characters through that fifo one at a time and prints them to standard output and then it returns zero to the caller. So, again, that's an example of a process without any weights or times in there. So, an SC_THREAD type is the only, there's another one called sc_method, sc_method isn't allowed to burn time, much like a function in Verilog, a function can't burn time but a task can burn time. sc_method can't burn time but SC_THREAD can. So, in an SC_THREAD, you can call wait to waive certain amount of time. I also, I wanted to talk about them because I will put that away for a second.
