So now we have come to a very important part of the course, where we will add a fourth terminal to the three terminal structure that we have, in last week and we will obtain the four terminal in MOS transistor. Initially we will assume that the channel is long, so we call it the Long-Channel MOS Transistor. Later on, we will allow it to be short and discuss additional effects, that they place when the channel is short. In this first video, I will give you an introduction to the Long-Channel Transistor and a preview of what is to follow. We begin with a simplified view, of a MOS transistor. We have, a petite body, heavily doped anti source and drain. Of course this will be an n channel MS transistor, once the channel is filled with electrons. Then we have an insulator, commonly referred to as the oxide, and on top we have a gate. And I should mention that for economy of space, we're showing the gate as a shallow region. In reality, as we have seen in more realistic pictures, it is much taller than what is shown here. So, the terminals of the transistor is called S for source, B for body, D for drain and G for gate. The width is W and the length is L. Now, we will make the following assumptions. L and W will be large. What does this mean? It means, very roughly, several times the minimum possible dimensions in a given fabrication process. And later on we can be more specific than this. We will assume that the substrate is uniformly doped throughout. We will assume VSB and VDB never become negative because if they do then you will be forward biasing the body source or body drain juncitons. And given that there will never be forward bias, we can neglect that very small leakage currents in the those regions for now. And we will also assume that the gate. The current is 0, because we have a perfect insulator there and that is thick enough and the body current is also 0. Later on, we will relax these assumptions but for now we start with a simplified long channel MS transistor as we call it where all of these things apply. So here is the transitor for now you can neglect the little square in the middle here. we have biased it, with voltages referred to the body. The gate body voltage is VGB. The source body voltage is VSB and the drain body voltage is VDB. In the particular situation I'm showing here, I have assumed that VDB is larger than VSB and the transistor as is shown in this example, is in strong inversion. What does it mean? It means that VGB is large enough to have placed in the gate plenty of positive electrons, that will deplete and then invert the semiconductor below the oxide. So the depletion region is showed here. We have ionized[UNKNOWN] acceptor atoms going in circles, and we have free electrons in the channel. Now as we have mentioned before... If you are in strong inversion, then you have plenty of electrons here in the channel, and you can think of this region in the channel as an extension of the end regions in the source and the drain. So think of it as one big n region. Around the source, we have a pn junction, which we would have even if there were no electrons in the channel, right? So we have applied VSP which is positive from n to p. This is a reverse bias and it creates certain depletion region width on the p side and a much smaller depletion region width on the very heavily[UNKNOWN] side which for simplicity we are not showing. Because VDB is larger than VSB it will create a deeper depletion region over here. So the reverse bias in the source body junction is VSB and the larger reverse bias in the drain body junction is VDB and in between you have another so to speak n type region for which the reverse bias increases gradually from VSB toward VDB. And this is why the depletion region gets deeper and deeper as you go towards the drain. Now we're going to pretty soon start neglecting what, what happens very close to the source and drain regions. So basically our channel will be so long that we can neglect. The about one depeltion region width around the source, and about one depletion region width near the drain. This would be a long channel approximation that we'll, we will adopt in this material for now. Later on we will relax this assumption. Now in addition to referring the voltages to the body as I have already mentioned, sometimes we need to refer the voltages to the source. And then we have this situation where now we have VGS is the gate to source potential. VDS is the drain to source potential. Rather, I should say voltage or potential difference. And VSB is the voltage between source and body. This could have been VBS body, refer to the source, but it is common to use the opposite of it, VSB. Now if you arrange these three voltages so that between any two terminals in this structure, you get the same, voltages as we get with this this structure, the two structures behaves identically. The device doesn't see any difference as far as the externally applied voltages across it's terminals are concerned, and you get identical behavior from both structures. Which means that for the right set of VGS, VSB, and VBS. To emulate this behavior the drain current here is the same as the drain current here. So let us plot some IV curves. Each of these curves applies to both, to each of these strucures. In other words. Both of these, apply to this structure and the same curves also apply to the bottom structure. So let's start with the top set of curves. When the VDB is equal to VSB, the current is 0 meaning that when visible, that's just equal to this voltage, there's not difference. A potential across the channel and therefore the current through the channel is 0 as you can see all of the curves meet at this point. And then if you start for a given VGB, let's say for example for VGB equal to VGB 3, we have this curve . If you start increasing VDB above VSB you start seeing more and more current and eventually you enter saturation. This is because as you increase VDB you increase the voltage between drain and source. And you are in strong inversion, where actually the device operates like a nonlinear resistor, so the larger the voltage, the larger the current. So it goes up. If you now increase your VGB even further, for example, if we go to VGB equal to VGB4, then the same thing happens but you have more current. For the same VDB. Now if instead of referring the voltage to the body, you want to refer them to the source, then you get this set of curves. Where now the horizontal axis is VDS, other than that, the curves are identical. In fact, you can get this set of curves from the curves above them, if you just shift them by VSB. So, if we now use a arigothimic current axis so that we can see a wide range. Of current values. We see the strong inverse at near the top, then as we lower the VGS, we go to moderate conversation and if we lower the VGS further, we are in wiki version, the darkest of the three regions here. The limits between weak inversion and moderate inversion, are denoted by VM if we're talking about VGS. And by a similar symbol if we're talking about VGB. But for now I will refer everything to the source and I will be talking about VGS. And the onset of strong inversion, which is the, the limit point between moderate inversion and strong inversion will be denoted by VH. We have, discussed these values when we talked about the 2 terminal and 3 terminal structures. But as you will see, I will be deriving models that are valued throughout all of the 3 regions. And these models don't care what VH and VM is. They're just valued everywhere. So let's talk about regions of inversion for the MOSFET more precisely now. So we have this, device in the particular situation that I'm showing here. I have assumed strong inversion. And we define the regions of inversion for the MOSFET by looking at the most heavily inverted channel end. In this particular case, the most heavily inverted channel end. Is the source end, because I have assumed that VDB was larger than VSB. And you may recall, from our discussion of the 3 terminal structure, the larger, the reverse bios you're applying to this terminal, the smaller the[INAUDIBLE] level will be. Back then, when we talked about the 3, terminal[INAUDIBLE] structure, we were talking VCD. Where C was the external terminal that made contact to the channel. Now, the C terminal has become the D terminal over here. So, the larger VDB is, the lighter the level of inversion here. So, and because we assume VDB is larger than VSP. This is the least inverted channel end, and the source end is the most inverted channel end, so in this case, I will be looking at the source. So if the most heavily inverted channel end is weakly inverted, then say the transistor is operating in weak inversion. If instead, that end is moderately inverted then, the transistor is set to operate in moderate conversion. Even that, is strongly inverted then the transistor is set to operate in strong inversion, as is the case in example that you see in this figure. Now I want to empahisize the following. Although this is storngly inverted in this example, if VDB becomes large enough, then this end of the channel here will not be strongly inverted anymore. Eventually, if VDB is large enoguh, you can take this end to moderate inversion or even to weak inversion. As far as the name of the region of operation for the transistor as a whole is concerned. You still call it a transistor in strong inversion simply because around the source, the channel, or rather near the source, the channel is strongly inverted. This is historically how people have named inversion regions. Let me now show you what happens in terms of, potentials in the channel, and the corresponding conduction band edge, e sub c, versus for example distance c. Assume, in the beginning that I don't have many positive charges in the gate and that I have not inverted the channel. The potential is low. Shown by curve a prime, as you see here. And the corresponding conduction band edge is high, that means that there is a barrier, qVBI that electrons would have to cross to go from the source region To the channel region. And because this barrier is high, very few electrons can make it, and you do not have inversion. Now if I increase the gate bias, then I have a larger surface potential. Shown here by. b prime, and that means the corresponding conduction of that edge goes down, and now you can see that the barrier that the electrons have to cross is very small in this vicinity, so it's easier for electrons to cross and they enter the channel. So let us assume that this allows the, channel and near the source, to be strongly inverted. If I now, increase the body, the drain body voltage, then gradually the voltage will increase, the potential will increase, from the source to the drain, in this direction. And the corresponding bandage will go down like this. And that is the case that we had shown in the previous slide. So this then, this here is a strongly inverted device that corresponds to this case. Because the drain is more positive the source, the negatively charged electrons have a tendency to go towards the most positive potential. So let me now preview what we will be doing in the next several lectures. We're going to derive several models. Each of them has something to, that goes with it. it has a certain set of assumptions, it has a certain accuracy and it has a certain history. So I'll have to cover all of these models because they're all used. And some of them are the basis on which today's CAD models are derived. So we will start with all region models, which are models that have sets of equations which are valid in all regions of inversion. I will start with a complete model, then I will simplify it. And then I will distinguish two cases, one would be body referenced and the other will be source referenced. Once we've finished with origin models we'll talk about strong inversion models. I will start from the complete model and derive a complete strong inversion model, and then I will talk about a simplified body reference and a simplified source reference model for strong inversion. And finally we'll go to weak inversion and derive a body reference model and a source reference model. So in this introduction, we have seen a simplified view of the long channel MOS transistor. We saw a set of curves so we didn't prove anything yet, and so all of that was a rather intuitive introduction. But starting now, in the next lecture we will start deriving things pretty rigorously.
